On an operating system (OS), when file data of a non-volatile storage device (for example, a hard disk or a solid state drive (SSD)) is deleted, the data is not actually deleted from the non-volatile storage device only by deleting management information corresponding to the data on the OS. Since a deleting process on the non-volatile storage device is not performed at every time when the data on the OS is deleted, operation performance is improved to the degree that the deleting process is not performed. This system is effective particularly in a hard disk drive in which access is slow.
On the other hand, since the data clearly deleted on the OS is recognized as data still valid on the non-volatile storage device (host invalid—device valid data), free areas in which no valid data is present on the non-volatile storage device are less than free areas recognized by the OS. In particular, depletion of the free areas on the non-volatile storage device may cause a big problem in an SSD in which logical addresses do not have a one-to-one relation with physical addresses of the non-volatile storage device in some cases.
The following problems may occur:
a problem of considerable deterioration in writing performance, since there is load on a process of ensuring new free blocks by retrieving invalid data areas in physical blocks (active blocks) of NAND flash memory recognized to have valid data by an SSD controller and performing garbage collection on valid data (NAND garbage collection) at the time of writing data to an SSD when free areas of the SSD are depleted, that is, physical blocks (free blocks) of the NAND flash memory recognized not to have valid data by the SSD controller are depleted; and
a problem of considerable deterioration in reliability of an SSD, when write access range is limited to specific areas or extra blocks are deleted due to frequent occurrence of NAND garbage collection when the writing is performed in a state where free areas on the SSD are depleted due to a lot of invalid data.
The above-mentioned problems can be avoided by performing deletion notification from a host (an information processing device) to an SSD when data is deleted on the host. Examples of the data deletion notification include data set management command (commonly called a trim command) described in INCITS ATA/ATAPI Command Set-2 (ACS-2) and Deallocate (AD) of 11h Dataset Management command described in NVM Express Revision 1.1. When data is deleted on a host in this system, a host notifies an SSD of logical address spaces in which deleted data is present, and thus the regions are treated as free areas afterward even on the SSD. Thus, the trim command realizes altering host-invalid and device-valid data into host-invalid and device-invalid data, and thus the SSD can newly ensure free areas.
When deletion notification is performed, a SSD controller invalidates a corresponding region by accessing a data management area. In the invalidating process, the corresponding region is recognized to be invalid by rewriting management information of the SSD. Data of the corresponding region may not be actually deleted or may be deleted.    Patent Document 1: JP 2010-157133 A    Patent Document 2: JP 2010-161199 A    Patent Document 3: JP 2011-29586 A    Patent Document 4: JP 2011-128998 A    Patent Document 5: U.S. Ser. No. 12/775,767    Patent Document 6: JP 5,002,719 B1    Patent Document 7: JP 2012-198811 A    Patent Document 8: JP 5,052,376 B1    Non-Patent Document 1: ATA/ATAPI Command Set-2 (ACS-2) d2015r6 Feb. 22, 2011 (http://www.t13.org/) pp. 98-99 and p. 50: Data Set Management Command (trim command), pp. 130-171: ECh IDENTIFY DEVICE command, pp. 342-365: SCT Command Transport, p. 217: 25h READ DMA EXT command, p. 218: 60h READ FPDMA QUEUED command, p. 322: 35h WRITE DMA EXT command, p. 324: 61h WRITE FPDMA QUEUDED command    Non-Patent Document 2: NVM Express Revision 1.1 Oct. 11, 2012 (http://www.nvmexpress.org/) p. 114: 11h Dataset Management command    Non-Patent Document 3: SCSI Block Commands-3 (SBC-3), Revision 35, Dec. 7, 2012 (http://www.t10.org/), p. 162: 42h UNMAP command    Non-Patent Document 4: Serial ATA International Organization: Serial ATA Revision 3.1 Gold Revision, Jul. 18, 2011, http://www.serialata.org/    Non-Patent Document 5: PCI Express Base Specification Revision 3.0, Nov. 10, 2010, http://www.pcisig.com/    Non-Patent Document 6: Serial ATA Technical Proposal: SATA 31_TPR_C108 Title: Device Sleep, http://www.serialata.org/    Non-Patent Document 7: “Well-known Storage Network” edited by Masaru Kitsuregawa, 1st Edition, Ohmsha, Ltd., pp. 6-9, pp. 67-93, May 20, 2011